IBM says new sub-one-nanometer architecture paves the way for the next decade of chip design

IBM Corp. today unveiled what it says is the world’s first sub-one-nanometer chip technology, a research breakthrough that it ...

IBM Unveils World’s First Sub-1nm Chip With 100 Billion 3D-Stacked Transistors

IBM just unveiled the world's first sub 1-nanometer chip: 100 billion transistors. IBM also says they've produced functioning ...

Atomic-level simulations predict transistor scaling limits

As the global semiconductor industry enters the so-called 2-nanometer process era, the actual size of transistors—the core ...
Interesting Engineering on MSN

‘World’s first’: IBM packs 100 billion transistors into a fingernail-sized sub-1 nm chip

IBM has introduced what it calls the world’s first sub-1 nanometer semiconductor technology, unveiling ...
Interesting Engineering on MSN

New atom-level calculations show transistors could shrink below 4 nanometers

KAIST researchers have developed a simulation-based method to predict how small future transistors can ...
Nanowerk

Novel dual-gate transistor design enables stable 3D semiconductor stacking

Researchers developed a dual-modulated vertically stacked transistor that eliminates current leakage at nanoscale channel lengths, advancing low-power 3D chip integration. (Nanowerk News) Researchers ...
Nature

Design of electronically tunable fractional-order elements based on distributed MOS transistor structures

This paper presents a design algorithm and implementation results for electronically tunable fractional-order elements (FOEs) with capacitive character based on distributed MOS transistor structures ...
TechSpot

MIT's 3D nanoscale transistors use quantum tunneling design to bypass physical limits

Why it matters: Silicon transistors are great, but just like any other object in the physical world, they are held back by a few limitations. The laws of physics put a bottleneck on performance and ...
Semiconductor Engineering

Applying a Floating Gate Field Effect Transistor To A Logic-in-Memory Application Circuit Design

A technical paper titled “Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)” was published by researchers at Konkuk University, Korea National ...
Nanowerk

Common lab design inflates 2D transistor performance by up to six times

Lab architecture used to test 2D semiconductors artificially boosts performance metrics, making it harder to assess whether these materials can truly replace silicon. (Nanowerk News) Two-dimensional ...
CNET

AMD revs up transistor designs

Advanced Micro Devices has brewed two new advanced transistor designs that it says will lead to higher chip performance. The chipmaker's researchers have created and demonstrated a new Fully Depleted ...
Electronic Design

History of the Transistor: How “Can You Hear Me Now” Led to Today’s Tech

The history of the transistor and similar types. How transistors made an impact on the world. How grudges eventually subside. Transistors are simple electronic devices that boost or switch electrical ...